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MAX4820/MAX4821
3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
ELECTRICAL CHARACTERISTICS (continued)
(V CC = +3V to +5.5V, V COM = V CC , T A = -40°C to +85°C, unless otherwise noted. Typical values are at T A = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SPI TIMING (MAX4820)
Turn-On Time (OUT_)
Turn-Off Time (OUT_)
SCLK Frequency
Cycle Time
CS Fall to SCLK Rise Setup
CS Rise to SCLK Hold
SCLK High Time
SCLK Low Time
Data Setup Time
Data Hold Time
t ON
t OFF
f SCLK
t CH + t CL
t CSS
t CSH
t CH
t CL
t DS
t DH
From rising edge of CS , R L = 50 Ω ,
C L = 50pF
From rising edge of CS , R L = 50 Ω ,
C L = 50pF
0
480
240
240
190
190
100
0
1.0
1.0
2.1
μs
μs
MHz
ns
ns
ns
ns
ns
ns
ns
SCLK Fall to DOUT Valid
Rise Time (DIN, SCLK, CS , SET ,
RESET )
Fall Time (DIN, SCLK, CS ,
RESET , SET )
RESET Min Pulse Width
SET Min Pulse Width
t DO
t SCR
t SCF
t RW
t SW
50% of SCLK to 10% of DOUT,
C L = 50pF
20% of V CC to 70% of V CC , C L = 50pF
20% of V CC to 70% of V CC , C L = 50pF
70
70
85
120
2
2
ns
μs
μs
ns
ns
PARALLEL TIMING (MAX4821)
Turn-On Time
Turn-Off Time
LVL Setup Time
LVL Hold Time
Address to CS Setup Time
Address to CS Hold Time
Rise Time (A2, A1, A0, LVL)
Fall Time (A2, A1, A0, LVL)
RESET Pulse Width
SET Pulse Width
t ON
t OFF
t LS
t LH
t AH
t AS
t SCR
t SCF
t RW
t SW
From rising edge of CS , R L = 50 Ω ,
C L = 50pF
From rising edge of CS , R L = 50 Ω ,
C L = 50pF
20% of V CC to 70% of V CC , C L = 50pF
20% of V CC to 70% of V CC , C L = 50pF
100
0
100
0
70
70
1
1
2
2
μs
μs
ns
ns
ns
ns
μs
μs
ns
ns
Note 2: Specifications at -40°C are guaranteed by design and not production tested.
Note 3: After relay turn-off, inductive kickback may momentarily cause the voltage at OUT_ to exceed V COM . This is considered part
of normal operation and will not damage the device.
Maxim Integrated
3
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